CD4023 Triple 3-input NAND Gate
The CD4023B NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.
Specification of CD4023 Triple 3-input NAND Gate:
- Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V.
- Buffered inputs and outputs.
- Standardized symmetrical output characteristics.
- Maximum input current of 1 µA at 18 V over-full package temperature range; 100 nA at 18 V and 25°C.
- 100% tested for quiescent current at 20 V.
- 5-V, 10-V, and 15-V parametric ratings.
- Noise margin (over full package temperature range:
- 1 V at VDD = 5 V.
- 2 V at VDD = 10 V.
- 2.5 at VDD = 15 V.
Applications of CD4023 Triple 3-input NAND Gate:
- It is used in computer.
- It is used in electronic projects, calculator etc.
Also Searched as : cd4023 schematic, cd4023 datenblatt, fairchild cd4023, national semiconductor cd4023, cd4023 gate, motorola cd4023.