CD4522 Programmable BCD Divide-by-N Counter
The D4522B programmable BCD counter has a decoded "0" state output for divide-by-N applications. In single stage operation the "0" output is tied to the Preset Enable input. The Cascade Feedback allows multiple stage divide-by-N operation without the need for external gating. A HIGH on the Clock Inhibit disables the pulse-counting function. A HIGH on the Master Reset asynchronously resets the divide-by-N operation. The output is presented in BCD format.
Features of CD4522 Programmable BCD Divide-By-N Counter:
- Internally synchronous for high internal and external speeds.
- Logic edge-clocked design — increments on positive Clock transition or on negative Clock inhibit transition..
- 100% tested for quiescent current at 20-V.
- 5-V, 10-V, and 15-V parametric ratings.
- Standard symmetrical output characteristics.
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C.
Applications of CD4522 Programmable BCD Divide-By-N Counter:
- Frequency synthesizers.
- Phase-locked loops.
- Programmable down counters.
- Programmable frequency dividers.
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